EPM5032DI25 vs EPM5032DC Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5032DI25 sa pamamagitan ng Altera at EPM5032DC sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5032DI25 | EPM5032DC |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | 1 |
| Product Terms | 320 | — |
| Output Macrocells | 16 | — |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| I/O Standard | TTL-compatible | — |
| Packhaging | 24-pin Ceramic DIP (DI) with quartz window | DIP-24 (ceramic, windowed) |
| Programming Technology | UV-EPROM (erasable via quartz window) | — |
| Speed Grade | — | DC (commercial) |
| Temperature na Operasyon | — | 0C to +70C |
| Technology | — | Bipolar EPROM, UV-erasable |
| Programmable Logic Elements | — | AND array + fixed OR array per macrocell |
| Configuration Memory | — | EPROM (UV-erasable via package window) |
| Uri ng Pagpapasok | — | Through-hole (DIP) |
| Bilang ng Pin | — | 24 |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Programming Tool | — | Altera MAX+PLUS II / A+PLUS legacy |
| Katayuan ng Lifecycle | — | Obsolete (mature legacy) |