EPM5032DI25 vs EPM5032DC 比較
詳細並排比較 EPM5032DI25 由 Altera 與 EPM5032DC 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5032DI25 | EPM5032DC |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | 1 |
| Product Terms | 320 | — |
| Output Macrocells | 16 | — |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| I/O Standard | TTL-compatible | — |
| 封裝 | 24-pin Ceramic DIP (DI) with quartz window | DIP-24 (ceramic, windowed) |
| Programming Technology | UV-EPROM (erasable via quartz window) | — |
| Speed Grade | — | DC (commercial) |
| 工作溫度 | — | 0C to +70C |
| Technology | — | Bipolar EPROM, UV-erasable |
| Programmable Logic Elements | — | AND array + fixed OR array per macrocell |
| Configuration Memory | — | EPROM (UV-erasable via package window) |
| 安裝類型 | — | Through-hole (DIP) |
| 腳位數 | — | 24 |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| Programming Tool | — | Altera MAX+PLUS II / A+PLUS legacy |
| 生命週期狀態 | — | Obsolete (mature legacy) |