EPM5032DI25 vs EPM5032DC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5032DI25 sa pamamagitan ng Altera at EPM5032DC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 ObsoletePagsanggunian na paghahambing
| Parametro | EPM5032DI25 | EPM5032DC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-erasable EPLD (CMOS EPROM-based) | UV-erasable EPLD (PAL-type CMOS) |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | — |
| Product Terms | 320 | — |
| Output Macrocells | 16 | — |
| Bidirectional I/O Pins | 16 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | — |
| Maximum Clock Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (nominal) |
| I/O Standard | TTL-compatible | — |
| Packhaging | 24-pin Ceramic DIP (DI) with quartz window | CERDIP-28 (windowed, through-hole) |
| Programming Technology | UV-EPROM (erasable via quartz window) | — |
| Usable Gates | — | 600 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Logic Family | — | CMOS, TTL-compatible I/O |
| Programmable Pins | — | 16 bidirectional I/O + 4 dedicated input = 20 |
| Total Package Pins | — | 28 |
| Uri ng Pagpapasok | — | Through-Hole (DIP) |
| Temperature na Operasyon | — | 0C to +70C (commercial) |
| Erasure Method | — | UV light through ceramic quartz window |
| Process Technology | — | CMOS |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | unknown |