EPM5064LC vs EPM5064JC1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5064LC sa pamamagitan ng Altera at EPM5064JC1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5064LC | EPM5064JC1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD / EPLD (Erasable PLD) |
| Programming Type | OTP (One-Time-Programmable, UV-erasable EPROM) | — |
| Macro Cells | 64 | — |
| Usable Gates | 1.25K | 1.25K |
| Logic Array Blocks (LABs) | 4 | 4 |
| Propagation Delay (tPD) | 55 ns | — |
| Total Inputs | 36 (7 dedicated + 29 I/O) | 36 (28 I/O + 7 dedicated + 1 clock) |
| I/O Pins | 28 bidirectional + 4 dedicated input | 28 |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | — |
| Packhaging | PLCC-44 (LCC-44, J-lead) | 44-pin PLCC (J-Lead) |
| Process Technology | CMOS EPROM | CMOS |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status - pre-RoHS legacy part, likely non_compliant] | unknown |
| Lead Free | [DATA_NEEDED: lead-free status] | — |
| Macrocells | — | 64 |
| Maximum Operating Frequency (fCNT) | — | 62.5 MHz |
| External Clock Input (max) | — | 50 MHz |
| Dedicated Inputs | — | 7 |
| Operating Voltage (VCC) | — | 5 V |
| Program Type | — | EPROM (one-time programmable, UV-erasable) |
| Operating Temperature (JC suffix) | — | 0°C to +70°C (commercial) |
| Supply Current (ICC) | — | [DATA_NEEDED: ICC maximum] |
| Lead-Free Status | — | unknown |