EPM5064LC vs EPM5064JC1 比較
詳細並排比較 EPM5064LC 由 Altera 與 EPM5064JC1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5064LC | EPM5064JC1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD / EPLD (Erasable PLD) |
| Programming Type | OTP (One-Time-Programmable, UV-erasable EPROM) | — |
| Macro Cells | 64 | — |
| Usable Gates | 1.25K | 1.25K |
| Logic Array Blocks (LABs) | 4 | 4 |
| Propagation Delay (tPD) | 55 ns | — |
| Total Inputs | 36 (7 dedicated + 29 I/O) | 36 (28 I/O + 7 dedicated + 1 clock) |
| I/O Pins | 28 bidirectional + 4 dedicated input | 28 |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| 工作溫度 | 0C to +70C (Commercial) | — |
| 封裝 | PLCC-44 (LCC-44, J-lead) | 44-pin PLCC (J-Lead) |
| Process Technology | CMOS EPROM | CMOS |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - pre-RoHS legacy part, likely non_compliant] | unknown |
| Lead Free | [DATA_NEEDED: lead-free status] | — |
| Macrocells | — | 64 |
| Maximum Operating Frequency (fCNT) | — | 62.5 MHz |
| External Clock Input (max) | — | 50 MHz |
| Dedicated Inputs | — | 7 |
| Operating Voltage (VCC) | — | 5 V |
| Program Type | — | EPROM (one-time programmable, UV-erasable) |
| Operating Temperature (JC suffix) | — | 0°C to +70°C (commercial) |
| Supply Current (ICC) | — | [DATA_NEEDED: ICC maximum] |
| Lead-Free Status | — | unknown |