EPM5128GC vs EPM5128JC-1 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5128GC sa pamamagitan ng Altera at EPM5128JC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5128GC EPM5128JC-1
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 5000 MAX 5000
Macrocells 128 128
Usable Gates 2,500 2,500
Logic Elements / LABs [DATA_NEEDED: LAB count] —
User I/Os 68 —
Package Type WPGA (Windowed Ceramic Pin Grid Array) —
Package Code WPGA —
Number of Terminals 68 —
Terminal Form PIN/PEG (through-hole PGA with alignment pegs) —
Package Shape Square —
Temperature Grade Commercial —
Supply Voltage (Vcc) 5 V —
Process Technology CMOS, UV-erasable —
Architecture EPLD, programmable AND/OR array with fixed OR plane —
Propagation Delay (tpd) [DATA_NEEDED: tpd in ns] —
Maximum Frequency (fmax) [DATA_NEEDED: fmax in MHz] —
Programmable Security Bit Yes —
Configuration Memory Non-volatile UV-EPROM (windowed ceramic) Non-volatile EPROM (UV-erasable)
Uri ng Pagpapasok Through-Hole (PGA socket required) Surface Mount
Tindminan RoHS [DATA_NEEDED: RoHS compliance] non_compliant (ceramic windowed package)
Device Type — Erasable Programmable Logic Device (EPLD/CPLD)
Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Maximum Operating Frequency — 62.5 MHz
Pin-to-Pin Propagation Delay (tPD) — 40 ns
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
Technology — CMOS, UV-erasable EPROM
Packhaging — 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier)
Temperature na Operasyon — [DATA_NEEDED: temperature grade]
Programming Interface — JTAG / Altera dedicated programmer
Katayuan ng Lifecycle — Obsolete - last-time-buy inventory only

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