EPM5128GC vs EPM5128JC-1 比較

詳細並排比較 EPM5128GC 由 Altera 與 EPM5128JC-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM5128GC EPM5128JC-1
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family MAX 5000 MAX 5000
Macrocells 128 128
Usable Gates 2,500 2,500
Logic Elements / LABs [DATA_NEEDED: LAB count] —
User I/Os 68 —
Package Type WPGA (Windowed Ceramic Pin Grid Array) —
Package Code WPGA —
Number of Terminals 68 —
Terminal Form PIN/PEG (through-hole PGA with alignment pegs) —
Package Shape Square —
Temperature Grade Commercial —
Supply Voltage (Vcc) 5 V —
Process Technology CMOS, UV-erasable —
Architecture EPLD, programmable AND/OR array with fixed OR plane —
Propagation Delay (tpd) [DATA_NEEDED: tpd in ns] —
Maximum Frequency (fmax) [DATA_NEEDED: fmax in MHz] —
Programmable Security Bit Yes —
Configuration Memory Non-volatile UV-EPROM (windowed ceramic) Non-volatile EPROM (UV-erasable)
安裝類型 Through-Hole (PGA socket required) Surface Mount
RoHS 狀態 [DATA_NEEDED: RoHS compliance] non_compliant (ceramic windowed package)
Device Type — Erasable Programmable Logic Device (EPLD/CPLD)
Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Maximum Operating Frequency — 62.5 MHz
Pin-to-Pin Propagation Delay (tPD) — 40 ns
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
Technology — CMOS, UV-erasable EPROM
封裝 — 68-pin CQCCJ (Windowed Ceramic J-Lead Chip Carrier)
工作溫度 — [DATA_NEEDED: temperature grade]
Programming Interface — JTAG / Altera dedicated programmer
生命週期狀態 — Obsolete - last-time-buy inventory only

資料表與資源

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