EPM5128GM883B vs EPM5128JC-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5128GM883B sa pamamagitan ng Altera at EPM5128JC-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5128GM883B | EPM5128JC-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV EPLD (Erasable Programmable Logic Device) | UV-Erasable Programmable Logic Device (PLD) |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/O Pins | 52 | — |
| Dedicated Inputs | 7 | 7 |
| Propagation Delay (tpd) | 55 ns | — |
| External Clock Inputs | 1 | — |
| Technology | CMOS | — |
| Configuration Memory | UV-erasable EPROM | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Packhaging | PGA-883 (ceramic pin grid array) | 68-pin CQCC (Ceramic Quad Flat Pack), windowed |
| Temperature na Operasyon | -55C to +125C (military) | [DATA_NEEDED: operating temperature range] |
| Qualification | MIL-STD-883 Class B (suffix 883B) | — |
| Program/Erase Method | UV-erasable | UV (ceramic window) |
| Propagation Delay (tPD) | — | 45 ns (max) |
| Maximum Counter Frequency (fCNT) | — | 50 MHz |
| Input Setup Time (tSU) | — | 7.5 ns |
| Output Drive Current (IOH/IOL) | — | 12 mA DC |
| Process Technology | — | CMOS |
| Uri ng Pagpapasok | — | Surface Mount |
| Volte ng Pagbibigay | — | 5 V (nominal) |
| Erase/Program Cycles | — | [DATA_NEEDED: minimum erase/program cycles] |
| Tindminan RoHS | — | Non-compliant (ceramic windowed package contains lead-bearing solder) |
| Logic Family | — | TTL-compatible I/O |