EPM5128GM883B vs EPM5128JC-2 比較
詳細並排比較 EPM5128GM883B 由 Altera 與 EPM5128JC-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5128GM883B | EPM5128JC-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV EPLD (Erasable Programmable Logic Device) | UV-Erasable Programmable Logic Device (PLD) |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/O Pins | 52 | — |
| Dedicated Inputs | 7 | 7 |
| Propagation Delay (tpd) | 55 ns | — |
| External Clock Inputs | 1 | — |
| Technology | CMOS | — |
| Configuration Memory | UV-erasable EPROM | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| 封裝 | PGA-883 (ceramic pin grid array) | 68-pin CQCC (Ceramic Quad Flat Pack), windowed |
| 工作溫度 | -55C to +125C (military) | [DATA_NEEDED: operating temperature range] |
| Qualification | MIL-STD-883 Class B (suffix 883B) | — |
| Program/Erase Method | UV-erasable | UV (ceramic window) |
| Propagation Delay (tPD) | — | 45 ns (max) |
| Maximum Counter Frequency (fCNT) | — | 50 MHz |
| Input Setup Time (tSU) | — | 7.5 ns |
| Output Drive Current (IOH/IOL) | — | 12 mA DC |
| Process Technology | — | CMOS |
| 安裝類型 | — | Surface Mount |
| 供應電壓 | — | 5 V (nominal) |
| Erase/Program Cycles | — | [DATA_NEEDED: minimum erase/program cycles] |
| RoHS 狀態 | — | Non-compliant (ceramic windowed package contains lead-bearing solder) |
| Logic Family | — | TTL-compatible I/O |