EPM5130WC-1 vs EPM5130WM883B-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5130WC-1 sa pamamagitan ng Intel at EPM5130WM883B-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM5130WC-1 - 128-Macrocell 40ns UV CPLD, 100-pin CQFP | Intel (Altera) MAX 5000
EPM5130WC-1 ObsoleteAltera
EPM5130WM883B-1 - 128-Macrocell UV PLD, 5V, CQFP-100 | Altera MAX 5000
EPM5130WM883B-1 ObsoletePagsanggunian na paghahambing
| Parametro | EPM5130WC-1 | EPM5130WM883B-1 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | MAX 5000 | — |
| Manufacturer | Altera (now Intel) | Altera (now Intel PSG) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocell Count | 128 | — |
| Logic Array Blocks | Multiple LABs (per MAX 5000 architecture) | — |
| Propagation Delay (tpd) | 40 ns | — |
| Maksimum na Taktiko ng Oras | 50 MHz | — |
| Erasure Method | UV (ultraviolet, windowed package) | — |
| Process Technology | CMOS EPROM | — |
| User I/O Pins | Up to 100 | — |
| Package Type | 100-pin Ceramic QFP (Windowed) | CQFP-100, ceramic windowed (WM) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: military/industrial temperature grade] |
| Volte ng Pagbibigay | [DATA_NEEDED: VCC nominal] | — |
| Programmable | Yes (UV-erasable, non-volatile) | — |
| Logic Family | MAX 5000 (Altera) | — |
| Configuration Memory | EPROM (on-chip) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (CQFP with J-leads) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: confirmed RoHS for ceramic windowed CQFP] |
| Device Family | — | MAX 5000 (Classic EPLD) |
| Logic Type | — | UV-Erasable Programmable Logic Device (EPLD) |
| Technology | — | CMOS, EPROM cell |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Dedicated Inputs | — | 19 |
| I/O Pins | — | 48 (bi-directional) |
| Propagation Delay (tPD) | — | 55 ns |
| Maximum Clock Frequency (fMAX) | — | 33.3 MHz |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V (nominal 5 V) |
| External Clock Inputs | — | 1 global + shared inputs |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Military Screening | — | MIL-STD-883 Class B (883B suffix) |
| Programming Method | — | UV erase + EPROM programming |