EPM5192ALC84-15 vs EPM5192ALI84-20 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192ALC84-15 sa pamamagitan ng Altera at EPM5192ALI84-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192ALC84-15 EPM5192ALI84-20
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Family MAX 5000 (EPM5192) —
Device Type CPLD / UV-Erasable / OTP Complex PLD EPLD (UV-erasable / OTP Complex PLD)
Macrocells 192 192
Dedicated Inputs 7 —
User I/O Pins 64 —
Propagation Delay (tPD) 15 ns 20 ns (pin-compatible speed grade)
Propagation Delay (Industry Variant) 25 ns (per MicrochipUSA listing) —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) —
Process Technology CMOS (EPROM-based) CMOS, EPROM-based
Programmability UV-erasable window / OTP UV-erasable / one-time programmable (OTP)
Packhaging 84-pin PLCC (QCCJ, J-bend ceramic) —
Operating Temperature Grade Commercial Industrial (I)
Terminal Form J-BEND —
Package Code QCCJ QCCJ (Plastic Leaded Chip Carrier, J-bend)
Package Shape SQUARE —
Architecture Programmable Logic Array + Macrocell Registers + PIA interconnect —
Family — MAX 5000
User I/O Pins (max) — 84 (in PLCC-84 package)
Volte ng Pagbibigay — 5 V (single supply, TTL-compatible I/O)
Package Type — PLCC-84 (PQCC-84)
No. of Terminals — 84
Form of Terminal — J-BEND
Uri ng Pagpapasok — Surface Mount (PLCC socket compatible)
Logic Type — Combinatorial and registered, per-macrocell DFF
I/O Standard — TTL-compatible
Tindminan RoHS — [DATA_NEEDED: RoHS status - Altera MAX 5000 series is generally legacy and may not be RoHS compliant]

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita