EPM5192AQC100-15 vs EPM5192AQC-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192AQC100-15 sa pamamagitan ng Altera at EPM5192AQC-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192AQC100-15 | EPM5192AQC-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Altera (now Intel) | — |
| Family | MAX 5000 | — |
| Device Type | UV-Erasable / OTP Complex PLD (CPLD) | UV-Erasable / OTP Complex PLD (CPLD) |
| Technology | CMOS | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| Propagation Delay (tPD) | 25 ns (-15 speed grade) | 45 ns (-2 speed grade) |
| Total Inputs | 72 | 72 |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| External Clock Inputs | 1 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Packhaging | 100-pin PQFP (R-PQFP-G100) | 100-pin PQFP (R-PQFP-G100) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Memory | EPROM (UV-erasable, OTP) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: confirmed compliance status] |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial / industrial / military grade] |
| Series | — | MAX 5000 (EPM5192) |
| Maksimum na Taktiko ng Oras | — | [DATA_NEEDED: max fMAX for -2 grade] |
| Process Technology | — | CMOS |
| Switch Matrix | — | UV-Erasable / OTP (windowless on AQC package) |
| Lead Pitch | — | 0.635 mm |
| Terminal Form | — | Gull-wing |
| Programming Interface | — | JTAG (IEEE 1149.1) boundary scan |