EPM5192GC-1 vs EPM5192GI-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GC-1 sa pamamagitan ng Altera at EPM5192GI-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192GC-1 | EPM5192GI-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 (Classic) | MAX 5000 |
| Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 3,750 | — |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| Maximum Propagation Delay (tPD) | 40 ns | — |
| Maximum Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5.0 V |
| Process Technology | CMOS, UV-erasable / OTP | CMOS |
| Packhaging | 100-pin Ceramic PGA (GC) | 84-pin PGA (Pin Grid Array), windowed ceramic |
| Uri ng Pagpapasok | Through-Hole (PGA) | — |
| Configuration Method | UV-Erase / One-Time Programmable | — |
| Interconnect | Peripheral Interconnect Array (PIA) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature grade] | -40C to +85C (Industrial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | unknown (legacy UV-windowed package) |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| Architecture | — | PAL-type, UV-erasable CMOS |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Clock Frequency (fMAX) | — | 62.5 MHz |
| Configuration Memory | — | UV-EPROM (windowed ceramic PGA) |