EPM5192GC-1 vs EPM5192GI-1 比較
詳細並排比較 EPM5192GC-1 由 Altera 與 EPM5192GI-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192GC-1 | EPM5192GI-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 (Classic) | MAX 5000 |
| Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 3,750 | — |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| Maximum Propagation Delay (tPD) | 40 ns | — |
| Maximum Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5.0 V |
| Process Technology | CMOS, UV-erasable / OTP | CMOS |
| 封裝 | 100-pin Ceramic PGA (GC) | 84-pin PGA (Pin Grid Array), windowed ceramic |
| 安裝類型 | Through-Hole (PGA) | — |
| Configuration Method | UV-Erase / One-Time Programmable | — |
| Interconnect | Peripheral Interconnect Array (PIA) | — |
| 工作溫度 | [DATA_NEEDED: operating temperature grade] | -40C to +85C (Industrial) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | unknown (legacy UV-windowed package) |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| Architecture | — | PAL-type, UV-erasable CMOS |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Clock Frequency (fMAX) | — | 62.5 MHz |
| Configuration Memory | — | UV-EPROM (windowed ceramic PGA) |