EPM5192GI-2 vs EPM5192JI-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GI-2 sa pamamagitan ng Intel at EPM5192JI-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192GI-2 | EPM5192JI-2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Device Family | MAX 5000 | — |
| Product Type | UV-Erasable / OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 12 |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Maksimum na Taktiko ng Oras | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V nominal (4.5 V to 5.5 V) | — |
| Operating Temperature Grade | Industrial | — |
| Packhaging | 84-pin PGA (Pin Grid Array) | JLCC-68 (J-Lead Ceramic) |
| Package Code | PGA | — |
| Package Shape | Square | — |
| Terminal Form | PIN/PEG (through-hole) | — |
| Programming Method | UV-erase window (erasable) / OTP | — |
| Process Technology | CMOS | CMOS EPROM |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Non-compliant (ceramic JLCC, contains lead) |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 5000 |
| Flip-Flops | — | 192 |
| Speed Grade | — | -2 |
| Temperature na Operasyon | — | 0C to +70C (commercial) |
| Programming Technology | — | UV-Erasable EPROM |
| Architecture | — | Sum-of-products with Programmable Interconnect Array (PIA) |
| Volte ng Pagbibigay | — | 5 V (typical) |
| Uri ng Pagpapasok | — | Surface Mount |
| Katayuan ng Lifecycle | — | Obsolete (legacy Altera MAX 5000 family) |