EPM5192GI-2 vs EPM5192JI-2 比較
詳細並排比較 EPM5192GI-2 由 Intel 與 EPM5192JI-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192GI-2 | EPM5192JI-2 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Device Family | MAX 5000 | — |
| Product Type | UV-Erasable / OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 12 |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 30 ns | — |
| 最大時脈頻率 | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V nominal (4.5 V to 5.5 V) | — |
| Operating Temperature Grade | Industrial | — |
| 封裝 | 84-pin PGA (Pin Grid Array) | JLCC-68 (J-Lead Ceramic) |
| Package Code | PGA | — |
| Package Shape | Square | — |
| Terminal Form | PIN/PEG (through-hole) | — |
| Programming Method | UV-erase window (erasable) / OTP | — |
| Process Technology | CMOS | CMOS EPROM |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | Non-compliant (ceramic JLCC, contains lead) |
| Family | — | MAX 5000 |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 5000 |
| Flip-Flops | — | 192 |
| Speed Grade | — | -2 |
| 工作溫度 | — | 0C to +70C (commercial) |
| Programming Technology | — | UV-Erasable EPROM |
| Architecture | — | Sum-of-products with Programmable Interconnect Array (PIA) |
| 供應電壓 | — | 5 V (typical) |
| 安裝類型 | — | Surface Mount |
| 生命週期狀態 | — | Obsolete (legacy Altera MAX 5000 family) |