EPM5192JC-2 vs EPM5192GC84-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192JC-2 sa pamamagitan ng Altera at EPM5192GC84-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192JC-2 | EPM5192GC84-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable Programmable Logic Device (PLD) | UV-Erasable/OTP Complex PLD (CPLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 45 ns | 40 ns (speed grade -1) |
| Maksimum na Taktiko ng Oras | 40 MHz | 50 MHz |
| Process Technology | CMOS | — |
| Packhaging | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) | 84-pin PGA (Pin Grid Array), WPGA code |
| Uri ng Pagpapasok | Surface Mount | Through-hole (PGA socket) |
| Number of Terminals | 84 | — |
| Programming Method | UV-erase / EPROM | UV erasure (quartz window) + EPROM programmer |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | Compliant (per third-party distributor listing) |
| Family | — | MAX 5000 |
| Technology | — | CMOS (EPROM-cell based) |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Total Inputs / Outputs | — | 72 inputs / 64 outputs |
| Architecture | — | Shared input/clock and shared product terms |
| Temperature Grade | — | Commercial |
| Logic Element Type | — | Macrocells with AND/OR array |