EPM5192JC-2 vs EPM5192JI-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192JC-2 sa pamamagitan ng Altera at EPM5192JI-1 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192JC-2 | EPM5192JI-1 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable Programmable Logic Device (PLD) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 45 ns | 55 ns |
| Maksimum na Taktiko ng Oras | 40 MHz | — |
| Process Technology | CMOS | CMOS EPROM |
| Packhaging | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) | 84-pin JLCC (Windowed ceramic J-lead) |
| Uri ng Pagpapasok | Surface Mount | — |
| Number of Terminals | 84 | — |
| Programming Method | UV-erase / EPROM | External EPROM programmer (via programming hardware) |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Family | — | MAX 5000 |
| Device Type | — | CMOS UV-Erasable Programmable Logic Device (PLD / EPLD) |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V (nominal 5 V) |
| Temperature na Operasyon | — | Industrial, -40 C to +85 C |
| Configuration Memory | — | UV-erasable EPROM |
| Speed Grade | — | -1 (slowest grade in EPM5192 family) |
| Logic Element per Macrocell | — | 1 D flip-flop + AND/OR array |