EPM5192JC-2 vs EPM5192JI-1 比較
詳細並排比較 EPM5192JC-2 由 Altera 與 EPM5192JI-1 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192JC-2 | EPM5192JI-1 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Product Type | UV-erasable Programmable Logic Device (PLD) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 45 ns | 55 ns |
| 最大時脈頻率 | 40 MHz | — |
| Process Technology | CMOS | CMOS EPROM |
| 封裝 | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) | 84-pin JLCC (Windowed ceramic J-lead) |
| 安裝類型 | Surface Mount | — |
| Number of Terminals | 84 | — |
| Programming Method | UV-erase / EPROM | External EPROM programmer (via programming hardware) |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Family | — | MAX 5000 |
| Device Type | — | CMOS UV-Erasable Programmable Logic Device (PLD / EPLD) |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V (nominal 5 V) |
| 工作溫度 | — | Industrial, -40 C to +85 C |
| Configuration Memory | — | UV-erasable EPROM |
| Speed Grade | — | -1 (slowest grade in EPM5192 family) |
| Logic Element per Macrocell | — | 1 D flip-flop + AND/OR array |