EPM5192JI-2 vs EPM5192IC-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192JI-2 sa pamamagitan ng Altera at EPM5192IC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192JI-2 | EPM5192IC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 EPLD |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 5000 | 3750 |
| Dedicated Inputs | 12 | 7 |
| Flip-Flops | 192 | — |
| Speed Grade | -2 | — |
| Packhaging | JLCC-68 (J-Lead Ceramic) | 68-pin ceramic J-lead (IC-1 suffix) |
| Temperature na Operasyon | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Programming Technology | UV-Erasable EPROM | — |
| Architecture | Sum-of-products with Programmable Interconnect Array (PIA) | — |
| Volte ng Pagbibigay | 5 V (typical) | — |
| Process Technology | CMOS EPROM | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | Non-compliant (ceramic JLCC, contains lead) | — |
| Katayuan ng Lifecycle | Obsolete (legacy Altera MAX 5000 family) | — |
| I/O Pins | — | 64 |
| Pin-to-Pin Delay (tPD) | — | 15 ns (max, -1 speed grade) |
| Counter Frequency (fCNT) | — | 76.9 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| Technology | — | CMOS, UV-erasable, in-system programmable |
| Programming Interface | — | JTAG / IEEE Std 1149.1 boundary scan |
| Security Bit | — | Yes (design protection) |
| Supply Current (Icc, typical) | — | [DATA_NEEDED: Icc] mA |
| Output Drive Current (IOH/IOL) | — | [DATA_NEEDED: IOH/IOL] mA |