EPM5192LC-1 vs EPM5192GC84-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC-1 sa pamamagitan ng Altera at EPM5192GC84-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC-1 | EPM5192GC84-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD / CPLD | — |
| Macrocells | 192 | 192 |
| Logic Gates | 3750 (typical usable) | — |
| Dedicated Inputs | 7 | 7 |
| User I/O | 64 | — |
| Bilang ng Pins | 84 | — |
| Package Type | LDCC (Leaded Ceramic Chip Carrier), plastic windowless | — |
| Propagation Delay | 25 ns | — |
| Maksimum na Taktiko ng Oras | 50 MHz | 50 MHz |
| Volte ng Pagbibigay | 5 V nominal (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable / OTP EPROM cell | CMOS (EPROM-cell based) |
| Temperature na Operasyon | 0C to +70C (commercial) | — |
| Programmable Memory | EPROM (one-time or UV-erasable) | — |
| Speed Grade | -1 | — |
| Tindminan RoHS | Non-compliant (ceramic LDCC with Pb-bearing terminations) | Compliant (per third-party distributor listing) |
| Product Type | — | UV-Erasable/OTP Complex PLD (CPLD) |
| Propagation Delay (tPD) | — | 40 ns (speed grade -1) |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| User I/O Pins | — | 64 |
| Total Inputs / Outputs | — | 72 inputs / 64 outputs |
| Architecture | — | Shared input/clock and shared product terms |
| Packhaging | — | 84-pin PGA (Pin Grid Array), WPGA code |
| Temperature Grade | — | Commercial |
| Uri ng Pagpapasok | — | Through-hole (PGA socket) |
| Programming Method | — | UV erasure (quartz window) + EPROM programmer |
| Logic Element Type | — | Macrocells with AND/OR array |