EPM5192LC-M091A vs EPM5192LC-1 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC-M091A sa pamamagitan ng Altera at EPM5192LC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192LC-M091A EPM5192LC-1
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Device Family MAX 5000 EPLD —
Macrocells 192 192
User I/O Pins 64 —
Dedicated Inputs 7 7
Logic Array Blocks (LABs) 12 —
Global Clock Inputs 1 —
Propagation Delay (tpd) 55 ns (typical, MAX 5000 family) —
Supply Voltage (Vcc) 5 V —
Technology UV-erasable CMOS, EPROM-based CMOS, UV-erasable / OTP EPROM cell
Interconnect Programmable Interconnect Array (PIA) —
Packhaging LC (custom pin-grid / customer-specific, M091A designation) —
Bilang ng Pin [DATA_NEEDED: pin count of LC-M091A package] —
Temperature na Operasyon [DATA_NEEDED: operating temperature grade] 0C to +70C (commercial)
Configuration Memory Non-volatile EPROM (UV-erasable) —
Development Tool Altera MAX+PLUS II (legacy) —
Tindminan RoHS [DATA_NEEDED: RoHS status for EPM5192LC-M091A] Non-compliant (ceramic LDCC with Pb-bearing terminations)
Family — MAX 5000
Device Type — EPLD / CPLD
Logic Gates — 3750 (typical usable)
User I/O — 64
Bilang ng Pins — 84
Package Type — LDCC (Leaded Ceramic Chip Carrier), plastic windowless
Propagation Delay — 25 ns
Maksimum na Taktiko ng Oras — 50 MHz
Volte ng Pagbibigay — 5 V nominal (4.75 V to 5.25 V)
Programmable Memory — EPROM (one-time or UV-erasable)
Speed Grade — -1

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