EPM5192LC1 vs EPM5192GC84-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC1 sa pamamagitan ng Altera at EPM5192GC84-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC1 | EPM5192GC84-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex PLD (CPLD), UV-erasable/OTP | — |
| Macrocells | 192 | 192 |
| Equivalent Gates | 3750 | — |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| Packhaging | PQCC-84 (JEDEC S-PQCC-J84, 84-lead Plastic Leaded Chip Carrier) | 84-pin PGA (Pin Grid Array), WPGA code |
| Nominal Supply Voltage (VCC) | 5 V | — |
| Supply Voltage Range | 4.75 V to 5.25 V | — |
| Maksimum na Taktiko ng Oras | 50 MHz | 50 MHz |
| Propagation Delay (tPD) | 40 ns | 40 ns (speed grade -1) |
| Process Technology | CMOS EPROM | — |
| Programming Method | OTP (LC plastic package); UV-erasable equivalents in JC ceramic package | UV erasure (quartz window) + EPROM programmer |
| Operating Temperature (Commercial 'LC') | 0 °C to 70 °C | — |
| Uri ng Pagpapasok | Surface Mount | Through-hole (PGA socket) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Compliant (per third-party distributor listing) |
| JEDEC Package Code | S-PQCC-J84 | — |
| Product Type | — | UV-Erasable/OTP Complex PLD (CPLD) |
| Technology | — | CMOS (EPROM-cell based) |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Total Inputs / Outputs | — | 72 inputs / 64 outputs |
| Architecture | — | Shared input/clock and shared product terms |
| Temperature Grade | — | Commercial |
| Logic Element Type | — | Macrocells with AND/OR array |