EPM5192LC2 vs EPM5192LC-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC2 sa pamamagitan ng Intel at EPM5192LC-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC2 | EPM5192LC-2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | 192 |
| User I/O Pins | 64 | 64 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Dedicated Inputs | 7 | — |
| External Clock Inputs | 1 | 1 |
| Propagation Delay (tpd) | 45 ns (LC-2 speed grade) | — |
| Maksimum na Taktiko ng Oras | 50 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | CMOS | CMOS |
| Packhaging | PQCC-84 (84-pin Plastic J-Lead Chip Carrier) | PQCC-84 (PLCC-84, J-lead, surface mount) |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial/industrial/military grade] |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Reprogrammability | Windowed UV-erasable (ceramic package variants) / One-time programmable (plastic) | — |
| Dedicated Input Pins | — | 7 |
| Propagation Delay (tPD) | — | 45 ns (typical, -2 speed grade) |
| Maximum Internal Frequency | — | 50 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Programming | — | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |
| Volte ng Pagbibigay | — | 5 V (typical MAX 5000 family) |
| Tindminan RoHS | — | [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] |