EPM5192LC84-1 vs EPM5192JC-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC84-1 sa pamamagitan ng Altera at EPM5192JC-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC84-1 | EPM5192JC-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | CPLD - Complex Programmable Logic Device |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 7,500 | 3750 |
| Speed Grade | -1 | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD ns value] | 40 ns (speed grade -1) |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V |
| Program Memory Type | UV-EPROM / OTP | — |
| Packhaging | 84-pin PLCC (LC84) | — |
| Uri ng Pagpapasok | Surface Mount (J-lead) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| I/O Count | [DATA_NEEDED: I/O pin count] | — |
| Tindminan RoHS | [DATA_NEEDED: not stated in provided data] | — |
| Process Technology | CMOS EPROM | — |
| Technology | — | CMOS, UV-Erasable / OTP |
| Maximum Internal Frequency (fMAX) | — | 62.5 MHz |
| User I/O Pins | — | 84 |
| Package Type | — | 84-pin Ceramic Quad Flat Pack (CQFP), windowed |
| JEDEC Package Code | — | S-CQCC-J84 |
| Configuration Memory | — | UV-EPROM (erasable under UV lamp) |
| Programming Interface | — | Altera MAX programming interface (parallel, pre-JTAG for this family) |
| Process | — | CMOS EPROM |
| I/O Standard | — | TTL/CMOS 5 V compatible |