EPM5192LC84 vs EPM5192GC84-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC84 sa pamamagitan ng Altera at EPM5192GC84-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC84 | EPM5192GC84-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | Complex Programmable Logic Device (CPLD) | UV-Erasable/OTP Complex PLD (CPLD) |
| Family | MAX 5000 | MAX 5000 |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | 40 ns (speed grade -1) |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| Packhaging | LCC-84 (PQCC84, MS-018) | 84-pin PGA (Pin Grid Array), WPGA code |
| Bilang ng Pin | 84 | — |
| Uri ng Pagpapasok | Surface Mount (Socket-compatible) | Through-hole (PGA socket) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | — |
| Volte ng Pagbibigay | [DATA_NEEDED: VCC range] | — |
| User I/O | [DATA_NEEDED: max user I/O count] | — |
| Configuration Memory | EPROM / UV-Erasable | — |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| Tindminan RoHS | unknown | Compliant (per third-party distributor listing) |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Technology | — | CMOS (EPROM-cell based) |
| Macrocells | — | 192 |
| Maksimum na Taktiko ng Oras | — | 50 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Dedicated Inputs | — | 7 |
| User I/O Pins | — | 64 |
| Total Inputs / Outputs | — | 72 inputs / 64 outputs |
| Architecture | — | Shared input/clock and shared product terms |
| Temperature Grade | — | Commercial |
| Programming Method | — | UV erasure (quartz window) + EPROM programmer |
| Logic Element Type | — | Macrocells with AND/OR array |