EPM570F100C4N vs EPM570GF100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570F100C4N sa pamamagitan ng Intel at EPM570GF100C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570F100C4N | EPM570GF100C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements | 440 LE | 570 |
| Macrocells | 440 | 440 |
| Maximum User I/O | 80 | — |
| Pin-to-Pin Delay (tPD1) | 5.4 ns | — |
| User Flash Memory | 4.4 Kbits | — |
| Configuration Technology | Flash (non-volatile, instant-on) | — |
| Operating Voltage (Core) | 3.3 V (internal regulator) | — |
| I/O Voltage Support (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Packhaging | 100-FBGA (FineLine BGA) 11 mm x 11 mm | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch |
| Temperature na Operasyon | 0 C to +85 C (commercial) | -40C to +125C (industrial) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Hot Socketing | Yes | — |
| Device Family | — | MAX II |
| User I/Os | — | 76 |
| Propagation Delay (tPD) | — | 5.4 ns |
| Configuration Memory | — | On-chip Flash (non-volatile) |
| Core Voltage | — | 1.8 V (internal) |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) |
| Programming Interface | — | IEEE 1532 / JTAG (IEEE 1149.1) ISP |
| Tindminan RoHS | — | Compliant (lead-free) |
| Logic Family / Process | — | CMOS, Flash-based LUT |
| LABs | — | 4 (16 macrocells per LAB) |