EPM570F256C5N vs EPM570GF100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570F256C5N sa pamamagitan ng Altera at EPM570GF100C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570F256C5N | EPM570GF100C5N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | — |
| Logic Elements | 570 | 570 |
| Number of Macrocells | 440 | — |
| Internal Supply Voltage | 2.5 V / 3.3 V | — |
| User I/O Count | 160 | — |
| Pin-to-Pin Delay (tPD) | 5.4 ns | — |
| Maximum Operating Frequency | 304 MHz | — |
| Process Technology | 0.18 um | — |
| User Flash Memory | 8 Kbits | — |
| Program Memory Type | Non-volatile Flash | — |
| MultiVolt I/O Support | 1.5V / 1.8V / 2.5V / 3.3V | — |
| Programming Interface | JTAG (IEEE 1149.1), in-system | IEEE 1532 / JTAG (IEEE 1149.1) ISP |
| Packhaging | 256-FBGA (FineLine BGA) | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to 85C (TJ) | -40C to +125C (industrial) |
| Device Family | — | MAX II |
| Macrocells | — | 440 |
| User I/Os | — | 76 |
| Propagation Delay (tPD) | — | 5.4 ns |
| Configuration Memory | — | On-chip Flash (non-volatile) |
| Core Voltage | — | 1.8 V (internal) |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) |
| Tindminan RoHS | — | Compliant (lead-free) |
| Logic Family / Process | — | CMOS, Flash-based LUT |
| LABs | — | 4 (16 macrocells per LAB) |