EPM570F256C5N vs EPM570GF100C5N 比較
詳細並排比較 EPM570F256C5N 由 Altera 與 EPM570GF100C5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570F256C5N | EPM570GF100C5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | — |
| Logic Elements | 570 | 570 |
| Number of Macrocells | 440 | — |
| Internal Supply Voltage | 2.5 V / 3.3 V | — |
| User I/O Count | 160 | — |
| Pin-to-Pin Delay (tPD) | 5.4 ns | — |
| Maximum Operating Frequency | 304 MHz | — |
| Process Technology | 0.18 um | — |
| User Flash Memory | 8 Kbits | — |
| Program Memory Type | Non-volatile Flash | — |
| MultiVolt I/O Support | 1.5V / 1.8V / 2.5V / 3.3V | — |
| Programming Interface | JTAG (IEEE 1149.1), in-system | IEEE 1532 / JTAG (IEEE 1149.1) ISP |
| 封裝 | 256-FBGA (FineLine BGA) | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0C to 85C (TJ) | -40C to +125C (industrial) |
| Device Family | — | MAX II |
| Macrocells | — | 440 |
| User I/Os | — | 76 |
| Propagation Delay (tPD) | — | 5.4 ns |
| Configuration Memory | — | On-chip Flash (non-volatile) |
| Core Voltage | — | 1.8 V (internal) |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) |
| RoHS 狀態 | — | Compliant (lead-free) |
| Logic Family / Process | — | CMOS, Flash-based LUT |
| LABs | — | 4 (16 macrocells per LAB) |