EPM570GF100C5N vs EPM240GF100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570GF100C5N sa pamamagitan ng Altera at EPM240GF100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570GF100C5N | EPM240GF100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| User I/Os | 76 | 80 |
| Propagation Delay (tPD) | 5.4 ns | — |
| Packhaging | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch | 100-ball FBGA (11 x 11 mm, 1.0 mm pitch) |
| Configuration Memory | On-chip Flash (non-volatile) | On-chip non-volatile Flash |
| Core Voltage | 1.8 V (internal) | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | — |
| Temperature na Operasyon | -40C to +125C (industrial) | -40 C to +125 C |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1532 / JTAG (IEEE 1149.1) ISP | JTAG (IEEE 1149.1) / Jam STAPL |
| Tindminan RoHS | Compliant (lead-free) | Lead Free, RoHS compliant |
| Logic Family / Process | CMOS, Flash-based LUT | — |
| LABs | 4 (16 macrocells per LAB) | — |
| Family | — | MAX II |
| Logic Elements / Macro Cells | — | 192 macro cells |
| Pin-to-Pin Logic Delay (tPD) | — | 4.7 ns |
| Maximum Operating Frequency | — | 201.1 MHz |
| Logic Family | — | CMOS |
| Process Technology | — | 0.18 um |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User Flash Memory | — | 8 Kbits |