EPM570GF100C5N vs EPM570F100I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570GF100C5N sa pamamagitan ng Altera at EPM570F100I5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570GF100C5N | EPM570F100I5N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | 440 |
| User I/Os | 76 | — |
| Propagation Delay (tPD) | 5.4 ns | 8.7 ns (max), 5.4 ns (typical) |
| Packhaging | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch | 100-ball FineLine BGA (11x11 mm) |
| Configuration Memory | On-chip Flash (non-volatile) | — |
| Core Voltage | 1.8 V (internal) | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | — |
| Temperature na Operasyon | -40C to +125C (industrial) | -40C to +100C (Industrial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1532 / JTAG (IEEE 1149.1) ISP | JTAG (IEEE 1149.1), in-system programmable |
| Tindminan RoHS | Compliant (lead-free) | Compliant |
| Logic Family / Process | CMOS, Flash-based LUT | — |
| LABs | 4 (16 macrocells per LAB) | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Flash-based) |
| Logic Elements (LEs) | — | 570 |
| Maximum User I/Os | — | 76 |
| User Flash Memory | — | 8 Kbits |
| Maximum Operating Frequency | — | 304 MHz |
| Supply Voltage (VCCINT) | — | 2.375 V to 3.6 V |
| Typical Supply Current (ICC) | — | 55 mA |
| I/O Standards Supported | — | LVCMOS, LVTTL, LVDS, SSTL, HSTL (1.5/1.8/2.5/3.3 V) |
| Global Clocks | — | 4 |
| Process Technology | — | CMOS, Flash configuration cell |
| Hot Socketing | — | Supported |