EPM570GF100C5N vs EPM570F100I5N 比較
詳細並排比較 EPM570GF100C5N 由 Altera 與 EPM570F100I5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570GF100C5N | EPM570F100I5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | 440 |
| User I/Os | 76 | — |
| Propagation Delay (tPD) | 5.4 ns | 8.7 ns (max), 5.4 ns (typical) |
| 封裝 | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch | 100-ball FineLine BGA (11x11 mm) |
| Configuration Memory | On-chip Flash (non-volatile) | — |
| Core Voltage | 1.8 V (internal) | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | — |
| 工作溫度 | -40C to +125C (industrial) | -40C to +100C (Industrial) |
| 安裝類型 | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1532 / JTAG (IEEE 1149.1) ISP | JTAG (IEEE 1149.1), in-system programmable |
| RoHS 狀態 | Compliant (lead-free) | Compliant |
| Logic Family / Process | CMOS, Flash-based LUT | — |
| LABs | 4 (16 macrocells per LAB) | — |
| Family | — | MAX II |
| Device Type | — | CPLD (Flash-based) |
| Logic Elements (LEs) | — | 570 |
| Maximum User I/Os | — | 76 |
| User Flash Memory | — | 8 Kbits |
| Maximum Operating Frequency | — | 304 MHz |
| Supply Voltage (VCCINT) | — | 2.375 V to 3.6 V |
| Typical Supply Current (ICC) | — | 55 mA |
| I/O Standards Supported | — | LVCMOS, LVTTL, LVDS, SSTL, HSTL (1.5/1.8/2.5/3.3 V) |
| Global Clocks | — | 4 |
| Process Technology | — | CMOS, Flash configuration cell |
| Hot Socketing | — | Supported |