EPM570GF100C5N vs EPM570GF256-5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570GF100C5N sa pamamagitan ng Altera at EPM570GF256-5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM570GF100C5N | EPM570GF256-5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| User I/Os | 76 | — |
| Propagation Delay (tPD) | 5.4 ns | — |
| Packhaging | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch | 256-ball FineLine BGA (GF) |
| Configuration Memory | On-chip Flash (non-volatile) | Non-volatile Flash (instant-on) |
| Core Voltage | 1.8 V (internal) | 1.8 V |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| Temperature na Operasyon | -40C to +125C (industrial) | [DATA_NEEDED: industrial/commercial range] |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Programming Interface | IEEE 1532 / JTAG (IEEE 1149.1) ISP | JTAG (IEEE 1149.1) |
| Tindminan RoHS | Compliant (lead-free) | Compliant (Pb-free, 'G' suffix) |
| Logic Family / Process | CMOS, Flash-based LUT | — |
| LABs | 4 (16 macrocells per LAB) | — |
| Family | — | MAX II |
| Logic Elements (LEs) | — | 570 |
| Typical Gates | — | 440 (manufacturer marketing count) |
| User I/O Pins (max) | — | 160 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Number of Logic Array Blocks (LABs) | — | 57 |
| Process Technology | — | 0.18 µm CMOS |
| Speed Grade | — | -5 (slowest in family) |
| Internal Oscillator | — | Yes |