EPM570GF100C5N vs EPM570GF256-5N 比較
詳細並排比較 EPM570GF100C5N 由 Altera 與 EPM570GF256-5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570GF100C5N | EPM570GF256-5N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| User I/Os | 76 | — |
| Propagation Delay (tPD) | 5.4 ns | — |
| 封裝 | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch | 256-ball FineLine BGA (GF) |
| Configuration Memory | On-chip Flash (non-volatile) | Non-volatile Flash (instant-on) |
| Core Voltage | 1.8 V (internal) | 1.8 V |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| 工作溫度 | -40C to +125C (industrial) | [DATA_NEEDED: industrial/commercial range] |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| Programming Interface | IEEE 1532 / JTAG (IEEE 1149.1) ISP | JTAG (IEEE 1149.1) |
| RoHS 狀態 | Compliant (lead-free) | Compliant (Pb-free, 'G' suffix) |
| Logic Family / Process | CMOS, Flash-based LUT | — |
| LABs | 4 (16 macrocells per LAB) | — |
| Family | — | MAX II |
| Logic Elements (LEs) | — | 570 |
| Typical Gates | — | 440 (manufacturer marketing count) |
| User I/O Pins (max) | — | 160 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Number of Logic Array Blocks (LABs) | — | 57 |
| Process Technology | — | 0.18 µm CMOS |
| Speed Grade | — | -5 (slowest in family) |
| Internal Oscillator | — | Yes |