EPM570T100C4N vs EPM570T100C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570T100C4N sa pamamagitan ng Intel at EPM570T100C4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM570T100C4N - MAX II CPLD, 570 LE, 440 Macrocells, TQFP-100 | Intel
EPM570T100C4N ✓ NakahandaIntel
EPM570T100C4 - 570 LEs, 5.4ns CPLD | Intel (Altera) MAX II | TQFP-100
EPM570T100C4 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM570T100C4N | EPM570T100C4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | MAX II |
| Series | MAX® II | — |
| Logic Elements / Blocks | 570 | — |
| Macrocells | 440 | 440 |
| Number of User I/O | 76 | — |
| Propagation Delay (tpd) | 5.4 ns (speed grade 4) | — |
| Maximum Internal Frequency | 247.5 MHz | — |
| Process Technology | 0.18 µm | — |
| Supply Voltage - Internal | 2.5 V / 3.3 V | — |
| Programmable Type | In-System Programmable (Flash, non-volatile) | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Temperature na Operasyon | 0 °C to 85 °C (TJ, commercial) | 0C to +85C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Packhaging / Kaso | 100-TQFP (14 x 14 mm) | — |
| Supplier Device Package | 100-TQFP | — |
| Configuration Memory | Internal flash (no external PROM required) | — |
| JTAG / ISP | IEEE 1149.1 compliant | — |
| I/O Bank Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Product Status | Active | — |
| Tindminan RoHS | Compliant | Compliant |
| Logic Elements (LEs) | — | 570 |
| Maximum User I/O Pins (this package) | — | 80 |
| Pin-to-Pin Propagation Delay (tPD) | — | 5.4 ns |
| General-Purpose SRAM | — | 4.4 Mbits |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Packhaging | — | TQFP-100 (T100), 14 x 14 mm |
| Programming Interface | — | JTAG (IEEE 1149.1) - ISP |
| Level ng MSL | — | [DATA_NEEDED: MSL Level] |
| On-chip Oscillator | — | Yes (3.3 MHz / 5.5 MHz selectable) |
| Internal Logic Analyzers / ISP | — | JTAG-based in-system programmable, no external boot PROM required |