EPM570T144C5N vs EPM1270T144C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM570T144C5N sa pamamagitan ng Intel at EPM1270T144C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM1270T144C5N - MAX II CPLD, 980 LEs, 212 I/O, TQFP-144 | Intel/Altera
EPM1270T144C5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM570T144C5N | EPM1270T144C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | MAX II |
| Series | MAX II Device | — |
| Logic Elements (LEs) | 570 | 1270 |
| Macrocells | 440 | — |
| User I/Os | 116 | — |
| Internal User Flash Memory | 8 Kbit | — |
| Global Clocks | 4 | — |
| Process Technology | 0.18 µm 6-layer-metal flash | 0.18 µm |
| Core Voltage (VCCINT) | 1.8 V (typical, internally regulated) | — |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage, per bank) | — |
| Maximum User I/O Pins | 116 | — |
| Propagation Delay (tPD) | 5.5 ns (typical, [DATA_NEEDED: exact speed grade]) | 6.2 ns |
| Maximum Frequency (fMAX) | 201.1 MHz | — |
| Temperature na Operasyon | 0 °C to +85 °C (commercial, C5 grade) | 0 °C to +85 °C (Commercial) |
| Packhaging | TQFP-144 (20 × 20 mm, 0.5 mm pitch) | TQFP-144 (T144), 22 x 22 mm, 0.5 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (IEEE 1149.1), In-System Programmable |
| Configuration Storage | On-chip non-volatile flash | — |
| Supported I/O Standards | LVCMOS, LVTTL, PCI, LVDS, SSTL (per bank VCCIO) | — |
| Tindminan RoHS | Compliant | Compliant (lead-free) |
| Lead-Free | Yes | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Design Software | Intel Quartus II (MAX II device support) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 980 |
| Maximum User I/Os | — | 212 |
| Number of Logic Array Blocks (LABs) | — | 127 |
| Maximum Internal Frequency | — | 201.1 MHz |
| Supply Voltage (Core) | — | 2.5 V / 3.3 V |
| Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Speed Grade | — | -5 |
| Configuration Memory | — | Internal flash (non-volatile, instant-on) |
| Wala sa Halogen | — | Compliant |