EPM7096LC84-10 vs EPM7096LI68-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7096LC84-10 sa pamamagitan ng Intel at EPM7096LI68-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7096LC84-10 | EPM7096LI68-15 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | MAX 7000 | MAX 7000 (second-generation MAX architecture) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 96 | 96 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Maximum User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 10 ns (-10 speed grade) | 15 ns |
| Packhaging | 84-PLCC (J-Lead) | 68-pin PLCC (J-lead, QCCJ) |
| Process Technology | EEPROM-based, 5.0 V low-power CMOS (L) | CMOS EEPROM |
| Supply Voltage (VCC) | 5.0 V nominal (4.75 V - 5.25 V) | — |
| In-System Programmability | Yes, via IEEE 1149.1 JTAG | — |
| MultiVolt I/O | 2.5 V / 3.3 V / 5.0 V mixed-voltage interface | — |
| Hanay ng Temperature na Operasyon | 0C to +70C (Commercial, 'C') | — |
| Configuration Memory | Non-volatile EEPROM (instant-on) | — |
| Programmable Interconnect | PIA (Programmable Interconnect Array) | — |
| Uri ng Pagpapasok | Surface Mount (PLCC socket or SMT) | Surface Mount (J-lead) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| User I/O Pins | — | 52 |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Programmable Logic Type | — | EEPROM-based, in-system programmable (ISP) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |
| Boundary-Scan Test (BST) | — | Built-in JTAG BST circuitry |
| Output Option | — | Open-drain output option available |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |
| Speed Grade | — | -15 (15 ns tPD) |