EPM7096LC84-10 vs EPM7096LI68-15 比較

詳細並排比較 EPM7096LC84-10 由 Intel 與 EPM7096LI68-15 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EPM7096LI68-15 EPM7096LI68-15 - 96-Macrocell MAX 7000 CPLD, 15ns, PLCC-68

EPM7096LI68-15 - 96-Macrocell MAX 7000 CPLD, 15ns, PLCC-68

EPM7096LI68-15 ⚠ 最後購買機會

規格比較

參數 EPM7096LC84-10 EPM7096LI68-15
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND 最後購買
Family MAX 7000 MAX 7000 (second-generation MAX architecture)
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 96 96
Logic Array Blocks (LABs) 4 4
Maximum User I/O Pins 36 —
Propagation Delay (tPD) 10 ns (-10 speed grade) 15 ns
封裝 84-PLCC (J-Lead) 68-pin PLCC (J-lead, QCCJ)
Process Technology EEPROM-based, 5.0 V low-power CMOS (L) CMOS EEPROM
Supply Voltage (VCC) 5.0 V nominal (4.75 V - 5.25 V) —
In-System Programmability Yes, via IEEE 1149.1 JTAG —
MultiVolt I/O 2.5 V / 3.3 V / 5.0 V mixed-voltage interface —
工作溫度範圍 0C to +70C (Commercial, 'C') —
Configuration Memory Non-volatile EEPROM (instant-on) —
Programmable Interconnect PIA (Programmable Interconnect Array) —
安裝類型 Surface Mount (PLCC socket or SMT) Surface Mount (J-lead)
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
User I/O Pins — 52
Supply Voltage (VCCINT) — 5.0 V
Programmable Logic Type — EEPROM-based, in-system programmable (ISP)
Programming Interface — IEEE Std. 1149.1 JTAG
Boundary-Scan Test (BST) — Built-in JTAG BST circuitry
Output Option — Open-drain output option available
Operating Temperature Grade — Industrial (-40C to +85C)
Speed Grade — -15 (15 ns tPD)

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