EPM7096LC84-15 vs EPM7128SLC84-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7096LC84-15 sa pamamagitan ng Altera at EPM7128SLC84-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7096LC84-15 | EPM7128SLC84-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000S |
| Series | MAX 7000 (second-generation MAX architecture) | — |
| Macro Cells | 96 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Usable Gates | 1,800 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | 125 MHz |
| User I/O Pins | 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Programmable Type | EE PLD (in-system programmable via JTAG) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Packhaging / Kaso | 84-PLCC (J-Lead) | — |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (J-bend) |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Erase/Program Endurance | [DATA_NEEDED: erase/program cycle count] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | Non-compliant (contains lead in PLCC) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 128 |
| Logic Gates | — | 2500 |
| User I/Os | — | 68 |
| Total Package Pins | — | 84 |
| Packhaging | — | PLCC-84 (J-lead) |
| Propagation Delay (tpd) | — | 10 ns |
| Internal Frequency | — | 250 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5 V |
| Program Memory Type | — | EEPROM (in-system programmable) |
| JTAG (IEEE 1149.1) | — | Yes |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |