EPM7128AETC100-10 vs EPM7128AETC100-5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128AETC100-10 sa pamamagitan ng Intel at EPM7128AETC100-5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM7128AETC100-5N - 128-Macrocell MAX 7000A CPLD, 5ns | Intel / Altera
EPM7128AETC100-5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM7128AETC100-10 | EPM7128AETC100-5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macrocells | 128 | 128 |
| User I/Os | 84 | 84 |
| Usable Gates | 2.5K | — |
| Logic Array Blocks (LABs) | 8 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Tolerance | 5.0 V tolerant | — |
| Program Technology | EEPROM (in-system programmable) | — |
| Packhaging | 100-pin TQFP (ET) | 100-pin TQFP |
| Temperature na Operasyon | -40C to +85C (commercial/industrial) | 0C to +70C (commercial) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Tindminan RoHS | Compliant | Compliant |
| Katayuan ng Lifecycle | Obsolete (migrate to MAX II or MAX V) | — |
| Logic Gates (typical) | — | 2,500 |
| Pin-to-Pin Logic Delay (tPD) | — | 5 ns |
| Maximum Operating Frequency | — | 192.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Bank Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| 5V Tolerant Inputs | — | Yes (when VCCIO = 3.3 V) |
| Programmable Logic Type | — | EEPROM-based, in-system programmable |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) |
| Uri ng Pagpapasok | — | Surface Mount |