EPM7128AETC100-10 vs EPM7128ATC100-7F Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128AETC100-10 sa pamamagitan ng Intel at EPM7128ATC100-7F sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7128ATC100-7F - 128-Macrocell MAX 7000A CPLD, 7.5ns, 100-TQFP | Intel / Altera
EPM7128ATC100-7F NrndPagsanggunian na paghahambing
| Parametro | EPM7128AETC100-10 | EPM7128ATC100-7F |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| User I/Os | 84 | — |
| Usable Gates | 2.5K | 2.5K |
| Logic Array Blocks (LABs) | 8 | 8 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Tolerance | 5.0 V tolerant | — |
| Program Technology | EEPROM (in-system programmable) | — |
| Packhaging | 100-pin TQFP (ET) | 100-pin TQFP (14x14 mm) |
| Temperature na Operasyon | -40C to +85C (commercial/industrial) | -40C to +85C (industrial) |
| JTAG Support | IEEE 1149.1 boundary-scan | IEEE Std 1149.1 boundary-scan + ISP |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Katayuan ng Lifecycle | Obsolete (migrate to MAX II or MAX V) | — |
| Device | — | EPM7128A |
| Logic Elements / Macrocells | — | 128 macrocells |
| User I/O Pins | — | 84 (per MicrochipUSA) / 100 (per MAX 7000A datasheet range) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 116.3 MHz |
| Supply Voltage - Internal | — | 3.0 V to 3.6 V (nominal 3.3 V) |
| I/O Voltage | — | 2.5 V / 3.3 V (MultiVolt) |
| Programmable Type | — | EEPROM (in-system programmable, non-volatile) |
| Process Technology | — | CMOS, EEPROM configuration |
| Uri ng Pagpapasok | — | Surface Mount |