EPM7128AETC100-10 vs EPM7128ATC100-7F 比較
詳細並排比較 EPM7128AETC100-10 由 Intel 與 EPM7128ATC100-7F 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM7128ATC100-7F - 128-Macrocell MAX 7000A CPLD, 7.5ns, 100-TQFP | Intel / Altera
EPM7128ATC100-7F Nrnd規格比較
| 參數 | EPM7128AETC100-10 | EPM7128ATC100-7F |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| User I/Os | 84 | — |
| Usable Gates | 2.5K | 2.5K |
| Logic Array Blocks (LABs) | 8 | 8 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Tolerance | 5.0 V tolerant | — |
| Program Technology | EEPROM (in-system programmable) | — |
| 封裝 | 100-pin TQFP (ET) | 100-pin TQFP (14x14 mm) |
| 工作溫度 | -40C to +85C (commercial/industrial) | -40C to +85C (industrial) |
| JTAG Support | IEEE 1149.1 boundary-scan | IEEE Std 1149.1 boundary-scan + ISP |
| RoHS 狀態 | Compliant | [DATA_NEEDED: RoHS status] |
| 生命週期狀態 | Obsolete (migrate to MAX II or MAX V) | — |
| Device | — | EPM7128A |
| Logic Elements / Macrocells | — | 128 macrocells |
| User I/O Pins | — | 84 (per MicrochipUSA) / 100 (per MAX 7000A datasheet range) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 116.3 MHz |
| Supply Voltage - Internal | — | 3.0 V to 3.6 V (nominal 3.3 V) |
| I/O Voltage | — | 2.5 V / 3.3 V (MultiVolt) |
| Programmable Type | — | EEPROM (in-system programmable, non-volatile) |
| Process Technology | — | CMOS, EEPROM configuration |
| 安裝類型 | — | Surface Mount |