EPM7128ATC100-10 vs EPM7128ATC100-7F Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128ATC100-10 sa pamamagitan ng Altera at EPM7128ATC100-7F sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7128ATC100-10 - MAX 7000A CPLD, 128 Macrocells, 10ns TQFP-100 | Altera
EPM7128ATC100-10 ObsoleteAltera
EPM7128ATC100-7F - 128-Macrocell MAX 7000A CPLD, 7.5ns, 100-TQFP | Intel / Altera
EPM7128ATC100-7F NrndPagsanggunian na paghahambing
| Parametro | EPM7128ATC100-10 | EPM7128ATC100-7F |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000A | MAX 7000A |
| Architecture | Multiple Array MatriX (MAX) | — |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 4 | 8 |
| Usable Gates | 2.5K | 2.5K |
| User I/O Pins | 68 | 84 (per MicrochipUSA) / 100 (per MAX 7000A datasheet range) |
| Pin-to-Pin Logic Delay | 4.5 ns | — |
| Counter Frequency (max) | 227.3 MHz | — |
| Speed Grade | -10 (10 ns) | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Logic Level Support | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Program Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Packhaging | 100-pin TQFP (TC100) | 100-pin TQFP (14x14 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device | — | EPM7128A |
| Logic Elements / Macrocells | — | 128 macrocells |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 116.3 MHz |
| Supply Voltage - Internal | — | 3.0 V to 3.6 V (nominal 3.3 V) |
| I/O Voltage | — | 2.5 V / 3.3 V (MultiVolt) |
| Programmable Type | — | EEPROM (in-system programmable, non-volatile) |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan + ISP |
| Process Technology | — | CMOS, EEPROM configuration |