EPM7128ELC84-12 vs EPM7128ELC84-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128ELC84-12 sa pamamagitan ng Altera at EPM7128ELC84-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7128ELC84-12 | EPM7128ELC84-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | MAX 7000 (MAX 7000E series) | MAX 7000 |
| Logic Family | CMOS, EEPROM-based | — |
| Usable Gates | 2,500 | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 84 | 68 |
| Propagation Delay (tpd1) | 12 ns | — |
| Internal Global Clock Frequency | 90.9 MHz | — |
| Setup Time | 4.5 ns | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V (4.75 V to 5.25 V) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Packhaging | 84-pin PLCC (J-Lead, QCCJ) | 84-pin PLCC (J-Lead) |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | Surface Mount / Socket |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | IEEE 1149.1 (JTAG) ISP |
| Bilang ng Pin | 84 | — |
| Tindminan RoHS | Non-compliant (legacy 5V part, SnPb finish) | [DATA_NEEDED: RoHS status from datasheet] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Equivalent Logic Gates | — | [DATA_NEEDED: equivalent gate count from datasheet] |
| Dedicated Inputs | — | 12 |
| Operating Voltage (VCCINT/VCClO) | — | 5 V |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Counter Frequency (fCNT) | — | [DATA_NEEDED: fCNT from datasheet] |
| Technology | — | EEPROM-based CMOS |
| In-System Programmable | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status from datasheet] |