EPM7128ELC84-12 vs EPM7128SLC84-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128ELC84-12 sa pamamagitan ng Altera at EPM7128SLC84-7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7128ELC84-12 | EPM7128SLC84-7N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000 (MAX 7000E series) | — |
| Logic Family | CMOS, EEPROM-based | — |
| Usable Gates | 2,500 | — |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 84 | — |
| Propagation Delay (tpd1) | 12 ns | — |
| Internal Global Clock Frequency | 90.9 MHz | — |
| Setup Time | 4.5 ns | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V (4.75 V to 5.25 V) | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 C to +70 C (Commercial) |
| Packhaging | 84-pin PLCC (J-Lead, QCCJ) | 84-LCC (J-Lead), PLCC-84 |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Bilang ng Pin | 84 | — |
| Tindminan RoHS | Non-compliant (legacy 5V part, SnPb finish) | Compliant (lead-free 'N' suffix) |
| Series | — | MAX 7000S |
| Programmable Type | — | In System Programmable (ISP) |
| Uri ng Memory | — | EEPROM |
| Number of Macrocells | — | 128 |
| Number of Logic Elements/Blocks | — | 8 (Logic Array Blocks) |
| Number of Usable Gates | — | 2,500 |
| Number of I/O Pins | — | 68 |
| Propagation Delay (tpd) Max | — | 7.5 ns |
| Maximum Operating Frequency | — | 125 MHz |
| Counter Speed (Internal) | — | up to 175.4 MHz (family max) |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V (5 V nominal) |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |