EPM7128EQC100-10 vs EPM7128EQI100-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128EQC100-10 sa pamamagitan ng Altera at EPM7128EQI100-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM7128EQI100-15 - MAX 7000 CPLD, 128 Macrocells, 15ns | Altera/Intel
EPM7128EQI100-15 ObsoletePagsanggunian na paghahambing
| Parametro | EPM7128EQC100-10 | EPM7128EQI100-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000 |
| Logic Family | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | 2.5K |
| Logic Array Blocks (LABs) | 4 | 8 (16 macrocells each) |
| User I/O Pins | 84 | 84 |
| Propagation Delay (tpd) | 10 ns | — |
| Internal Performance | 100 MHz | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Technology | 5.0 V CMOS, EEPROM-based | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | — |
| Packhaging | 100-pin PQFP (Plastic Quad Flat Pack), gull-wing leads | 100-pin PQFP (BQFP, 14x20 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0 °C to +90 °C (Commercial) | -40 °C to +85 °C (industrial grade, "I" suffix) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free; verify per lot) |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 4.75 V to 5.25 V (5 V nominal) |
| Programming Technology | — | EEPROM (non-volatile, in-system programmable) |
| Boundary Scan | — | IEEE 1149.1 (JTAG) compliant |
| Manufacturer | — | Altera (now Intel FPGA) |