EPM7128EQC100-10 vs EPM7128EQI100-15 比較
詳細並排比較 EPM7128EQC100-10 由 Altera 與 EPM7128EQI100-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EPM7128EQI100-15 - MAX 7000 CPLD, 128 Macrocells, 15ns | Altera/Intel
EPM7128EQI100-15 Obsolete規格比較
| 參數 | EPM7128EQC100-10 | EPM7128EQI100-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000 |
| Logic Family | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | 2.5K |
| Logic Array Blocks (LABs) | 4 | 8 (16 macrocells each) |
| User I/O Pins | 84 | 84 |
| Propagation Delay (tpd) | 10 ns | — |
| Internal Performance | 100 MHz | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Technology | 5.0 V CMOS, EEPROM-based | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | — |
| 封裝 | 100-pin PQFP (Plastic Quad Flat Pack), gull-wing leads | 100-pin PQFP (BQFP, 14x20 mm) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0 °C to +90 °C (Commercial) | -40 °C to +85 °C (industrial grade, "I" suffix) |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free; verify per lot) |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 4.75 V to 5.25 V (5 V nominal) |
| Programming Technology | — | EEPROM (non-volatile, in-system programmable) |
| Boundary Scan | — | IEEE 1149.1 (JTAG) compliant |
| Manufacturer | — | Altera (now Intel FPGA) |