EPM7128SLC84-10 vs EPM7128SLC84-7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128SLC84-10 sa pamamagitan ng Intel at EPM7128SLC84-7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM7128SLC84-10 | EPM7128SLC84-7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 7000S | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| Logic Gates | 2500 | — |
| User I/Os | 68 | — |
| Total Package Pins | 84 | — |
| Packhaging | PLCC-84 (J-lead) | 84-LCC (J-Lead), PLCC-84 |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | 125 MHz |
| Internal Frequency | 250 MHz | — |
| Supply Voltage (VCCINT) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| JTAG (IEEE 1149.1) | Yes | — |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0 C to +70 C (Commercial) |
| Uri ng Pagpapasok | Surface Mount (J-bend) | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | Non-compliant (contains lead in PLCC) | Compliant (lead-free 'N' suffix) |
| Series | — | MAX 7000S |
| Programmable Type | — | In System Programmable (ISP) |
| Uri ng Memory | — | EEPROM |
| Number of Macrocells | — | 128 |
| Number of Logic Elements/Blocks | — | 8 (Logic Array Blocks) |
| Number of Usable Gates | — | 2,500 |
| Number of I/O Pins | — | 68 |
| Propagation Delay (tpd) Max | — | 7.5 ns |
| Counter Speed (Internal) | — | up to 175.4 MHz (family max) |