EPM7128SLC84-10 vs EPM7128SLC84-7N 比較
詳細並排比較 EPM7128SLC84-10 由 Intel 與 EPM7128SLC84-7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128SLC84-10 | EPM7128SLC84-7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 7000S | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| Logic Gates | 2500 | — |
| User I/Os | 68 | — |
| Total Package Pins | 84 | — |
| 封裝 | PLCC-84 (J-lead) | 84-LCC (J-Lead), PLCC-84 |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | 125 MHz |
| Internal Frequency | 250 MHz | — |
| Supply Voltage (VCCINT) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| JTAG (IEEE 1149.1) | Yes | — |
| 工作溫度 | 0C to +70C (Commercial) | 0 C to +70 C (Commercial) |
| 安裝類型 | Surface Mount (J-bend) | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS 狀態 | Non-compliant (contains lead in PLCC) | Compliant (lead-free 'N' suffix) |
| Series | — | MAX 7000S |
| Programmable Type | — | In System Programmable (ISP) |
| 記憶體類型 | — | EEPROM |
| Number of Macrocells | — | 128 |
| Number of Logic Elements/Blocks | — | 8 (Logic Array Blocks) |
| Number of Usable Gates | — | 2,500 |
| Number of I/O Pins | — | 68 |
| Propagation Delay (tpd) Max | — | 7.5 ns |
| Counter Speed (Internal) | — | up to 175.4 MHz (family max) |