EPM7128SLC84-7N vs EPM7128SLC84-6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7128SLC84-7N sa pamamagitan ng Intel at EPM7128SLC84-6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM7128SLC84-6N - MAX 7000S CPLD, 128 Macro, 6ns, 84-PLCC | Intel
EPM7128SLC84-6N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM7128SLC84-7N | EPM7128SLC84-6N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Series | MAX 7000S | — |
| Programmable Type | In System Programmable (ISP) | — |
| Uri ng Memory | EEPROM | — |
| Number of Macrocells | 128 | — |
| Number of Logic Elements/Blocks | 8 (Logic Array Blocks) | — |
| Number of Usable Gates | 2,500 | — |
| Number of I/O Pins | 68 | — |
| Propagation Delay (tpd) Max | 7.5 ns | — |
| Maximum Operating Frequency | 125 MHz | 147.1 MHz |
| Counter Speed (Internal) | up to 175.4 MHz (family max) | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | — |
| Temperature na Operasyon | 0 C to +70 C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Packhaging | 84-LCC (J-Lead), PLCC-84 | 84-pin PLCC (J-lead) |
| Uri ng Pagpapasok | Surface Mount | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | Compliant (lead-free 'N' suffix) | Non-Compliant (legacy 5V part) |
| Family | — | MAX 7000S |
| Device System Gates | — | 2500 |
| Number of Macro Cells | — | 128 |
| Number of User I/Os | — | 68 |
| Number of Logic Blocks/Elements | — | 8 |
| Number of Global Clocks | — | 2 |
| Product Terms per Macro Cell | — | 32 |
| Pin-to-Pin Delay (Speed Grade) | — | 6 ns |
| Volte ng Pagbibigay | — | 5 V |
| Process Technology | — | CMOS, EEPROM |
| Program Memory Type | — | EEPROM |
| In-System Programmability | — | Yes (ISP via JTAG) |